• Students know how to model an analog system for high-level verification and digital design.
• They can implement and optimize the layout of an analog system including different analog building blocks.
• Students can handle required layout verification and extraction tools.
• They know how to verify a mixed-signal integrated circuit product.

ILV "Analog Integrated Circuits 1"
ILV "Computer Aided Design 1"
ILV "Introduction to Integrated Circuits Design Project"

Over the course of this module, the project work for analog design, layout and top-level verification in a consecutive mixed-signal IC design project (ISCD-project) is covered.

• Top-level modelling of mixed-signal design
  • Definition of operation phases for the analog frontend
  • Specification of interfaces inside the analog frontend
  • Specification of interfaces to digital
  • High-level modelling of analog frontend for further use in digital design (à see ILV "Project-Dig")
• Layout of analog frontend
  • Definition of layout abstract
  • Layout floorplan for analog frontend
  • Preparation of mask design for analog building blocks
  • Verification (LVS and DRC)
• Post-Layout verification
  • Parasitic Extraction
  • Simulation and verification of extracted design
  • Debugging and optimization
• Top-level mixed-mode verification, including digital design (à alignment with module "Design and Implementation of Digital Circuits and Systems" required)

Lecture material as provided in the course (required)
Recommended reading as follows:

• B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Inc., 2000.
• R. J. Baker, CMOS Circuit Design, Layout and Simulation, Wiley IEEE Press, 2019.

Project-based learning based on a concrete design example.
Conceptual thinking to solve the given concept/design problems.
Collaborative learning by exchanging work products between students.

Integrated module examination
Final examination character: Presentation of project work, supported by project reports and one intermediate presentation in an early concept phase