• Students know the basics in digital circuit design, like digital numbers and algebra, sequential and concurrent processing, state machines and similar.
• They are able to define and implement synchronous and asynchronous digital designs.
• They understand digital design using a hardware description language (HDL), including verification and test.

None

• Math basics (refresher): Discrete algebra: e.g. graph theory, petri nets, logic, KV, DeMorgan, max-/min-terms, coding theory, Hamming dist., etc.
• Coding and digital number representations (refresher): Binary, 1s/2s complement, BCD, biased, CSD, Gray-Code, Thermometer-Code, etc.
• Design methodology and targets: Digital design flows (Fullcustom ASIC, Semicustom ASIC, FPGA/CPLD); Classical HDL based (VHDL, Verilog, SystemC); important differences between ASIC and FPGA design
• Combinatorial logic, optimisation, transitions/spiking, decoding, LUTs, etc.
• Sequential synchronous logic, single/multi-edge clocking, clock tree, race conditions, setup/hold considerations, clock domain crossings
• Basic digital structures: encoders, decoders, multiplexers, demultiplexers, adders, counters and shift registers; state machines (Mealy, Moore, Medvedev), state encoding options, etc. (incl. related HDL templates)
• Digital concept basics: potential issues and how to document concepts properly and design/code them in any HDL
• Brief link to full-custom (analog) design: MOS as switch, push-pull structure (inverter), complex gate design, open-drain structures, VM, delay
• JEDEC digital levels/interfaces (CMOS, LV-CMOS,etc.); fan-in/out, sn buffer design; gate libraries, complexity estimations
• Verification and test basics: testbenches for directed tests, ATPG (scan path testing)
• Practical Examples

Lecture material as provided in the course (required)
Recommended reading as follows:

• F. Vahid, Digital Design with RTL Design, VHDL, and Verilog, Wiley, 2011.
• J. M. Rabaey et al., Digital Integrated Circuits: A Design Perspective, Prentice Hall, 2002.
• R. Katz, Contemporary Logic Design, Pearson, 2004.
• D. E. Thomas, P. R. Moorby, The Verilog Hardware Description Language, Springer, 1996.
• K. C. Chang, Digital Systems Design with VHDL and Synthesis, Wiley, 1999.
• A. Rushton, VHDL for Logic Synthesis, Wiley, 2011.
• F. P. Prosser, D. E. Winkel, The Art of Digital Design - An Introduction to Top-Down Design, Prentice-Hall, 1987.

Project-based learning based on hands on examples.
Collaborative learning based on assignments covering different topics.
Flipped classroom by incorporating student presentations from asynchronous learning (homework) tasks.

Integrated module examination
Immanent examination character: Written/oral exam, including homework assignments, presentations and lecture contribution