• Students know how to model analog building blocks for concept study and specification.
• They are able to design basic analog circuits like amplifiers or comparators for mixed-signal application.
• They are experienced in dimensioning and optimizing of analog circuit architectures by hand-estimation and simulation tools.
• They know how to verify analog systems consisting of different analog building blocks based on a verification plan.

ILV "Analog Integrated Circuits 1"
ILV "Computer Aided Design 1"
ILV "Methods in Systems and Circuits Theory"

Over the course of this module, the project work for analog design and modelling in a consecutive mixed-signal IC design project (ISCD-project) is covered. This involves:

• Concept development and modelling
  • Conceptual investigations based on overall "product" specification
  • Definition of design specification for each analog building block
  • Modelling of analog frontend
  • Preparation of requirement and performance specification of analog building blocks
• Systematic design optimization for analog building blocks
  • Characterization of devices from technology
  • Hand-calculations based on device specifications
  • Schematic design and simulation
  • Design optimization
• Verification of analog building blocks
  • Development of a verification plan for analog building blocks
  • Design verification according the verification plan
• Top-level design and simulation of analog front-end
• Documentation and reporting

Lecture material as provided in the course (required)
Recommended reading as follows:

• B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Inc., 2000.
• R. J. Baker, CMOS Circuit Design, Layout and Simulation, Wiley IEEE Press, 2019.

Project-based learning based on concrete design example.
Conceptual thinking to solve the given concept/design problems.
Collaborative learning by exchanging work products between students.

Integrated module examination
Final examination character: Presentation of project work, supported by project reports and one intermediate presentation in an early concept phase