Lehrveranstaltung | Typ | SWS | ECTS-Credits | LV-Nummer |
---|---|---|---|---|
Computer Aided Design 2 | ILV | 3,5 | 5,0 | M2.02840.20.031 |
Master Thesis | MT | 0,5 | 24,0 | M2.02840.40.011 |
Master Thesis Seminar | SE | 3,0 | 3,0 | M2.0840.40.021 |
Lehrveranstaltung | Typ | SWS | ECTS-Credits | LV-Nummer |
---|---|---|---|---|
Digital Integrated Circuits 1 | ILV | 3,5 | 5,0 | M2.02840.10.021 |
Introduction to Integrated Circuits Design Project | PA | 3,0 | 5,0 | M2.0284.10.041 |
Vertiefung: Elektronik | Typ | SWS | ECTS-Credits | |
---|---|---|---|---|
Integrierte Schaltungen Grundlagen | ILV | 2,0 | 2,0 | B2.05272.50.390 |
Titel | Autor | Jahr |
---|---|---|
Reusable performance checkers in pre-silicon verification of mixed-signal IPs | Efstathios Markou | 2024 |
Digital Readout of the ATLAS Muon Spectrometer | Michael Dauer | 2023 |
Automotive Analog Hall Sensor with Ratiometric Output | Michaela Keil | 2022 |
Modelling of Class D amplifier for Sensor Applications with IEEE 1666.1 | David Kwaku Okyere DARKWAH | 2021 |
Titel | Autor | Jahr |
---|---|---|
Reusable performance checkers in pre-silicon verification of mixed-signal IPs | Efstathios Markou | 2024 |
Titel | Autor | Jahr |
---|---|---|
Digital Readout of the ATLAS Muon Spectrometer | Michael Dauer | 2023 |
Titel | Autor | Jahr |
---|---|---|
Automotive Analog Hall Sensor with Ratiometric Output | Michaela Keil | 2022 |
Titel | Autor | Jahr |
---|---|---|
Modelling of Class D amplifier for Sensor Applications with IEEE 1666.1 | David Kwaku Okyere DARKWAH | 2021 |
Titel | Autor | Jahr |
---|---|---|
TEMPERATURE CONTROL SYSTEM | 2021 | |
Sinewave generator for capacitive sensor applications | 2020 |
Titel | Autor | Jahr |
---|---|---|
TEMPERATURE CONTROL SYSTEM | 2021 |
Titel | Autor | Jahr |
---|---|---|
Sinewave generator for capacitive sensor applications | 2020 |
Laufzeit | April/2023 - März/2028 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Josef Ressel Zentrum |
Förderinstitution/Auftraggeber |
The JR Centre for System-on-Chip Design Automation funded by the Christian Doppler Forschungsgesellschaft and Bundesministerium Arbeit und Wirtschaft aims to research fundamentally new methods for the development of „system-on-chips" in modern semiconductor technologies and to advance the automation of the development process of integrated circuits. Until now, chip designers have spent a lot of time for routine tasks like reworking basic circuit blocks with already given functionality in existing technologies to enable cost reduction. The JR Centre’s research will help to automate the development of integrated circuits and thus free up the working time of experts for innovative new development tasks, therefore making an essential contribution to strengthening competitiveness in the semiconductor industry.
- Christian Doppler Forschungsgesellschaft (CDG) (Fördergeber/Auftraggeber)
- Infineon Technologies Austria AG
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Lead Partner)
Laufzeit | Dezember/2023 - Oktober/2024 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
Polymer fibers (PMF) reflect the latest and leading-edge research in wireline communication systems and a next step in direction of low-power, low-cost and high speed operation. Compared to optical fibers, they can be significantly more cost efficient in installation and operation. In respect to copper (twisted-pair e.g. CAT7/8 Ethernet, SATA, HDMI or similar), they can be also faster at lower power consumption. This applied research project aims to develop a research platform on one of the latest RF-SoC (radio frequency – system on chip) FPGAs (field programmable gate array), to allow more detailed analysis of the potential of such PMF links and to develop a real-life demonstration to show its capability. The research includes research on reliable communication (modulation) systems, which will differ significantly to the mentioned optical and copper SERDES (serialize/deserialize) connections but this system not yet defined. It also includes for the integration of the RF link the integration of the latest 60GHz transceiver ICs of Infineon Technologies (BGT60), which is also financing this research project. Thus this work can contribute to the development of a future PMF link standard, in a similar fashion as the initially mentioned standardized communication links.
- Infineon Technologies Austria AG (Fördergeber/Auftraggeber)
Laufzeit | Oktober/2023 - September/2027 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Bildungsforschung |
Studiengänge | |
Forschungsprogramm | DIGITAL-2022-SKILLS-03-SPECIALISED-EDU, DIGITAL-SIMPLE |
Förderinstitution/Auftraggeber |
The EU Chips Act aims to increase Europe‘s global production share of semiconductors to 20% by 2030, leading to a need for a skilled workforce to support this growth. Additionally, the EU‘s Green Deal initiative focuses on a transition to sustainable and energy efficient technologies, further emphasizing the need for expertise in sustainable chip development and green applications. There is an EU wide shortage of skilled workers in microelectronics. Addressing this shortage will be crucial in meeting the goals of both the EU Chips Act and the Green Deal. Furthermore, the next generation of students is largely interested in contributing to a sustainable environment. Providing them with the opportunity to gain deeper expertise in this field will align their skills with the industry‘s future needs. The proposed project „Green Chips-EDU“ supports the aforementioned goals by addressing the needs and challenges of a green and digital transition in the microelectronics industry. The consortium, made up of 15 key players from 7 EU countries, aims to build an attractive education ecosystem in green microelectronics by integrating the knowledge triangle of excellent education, industries needs and research challenges. The consortium includes 6 Unite! partners working on a harmonized curriculum focusing on energy efficiency and the development of sustainable integrated circuits. The project addresses all objectives from the call by offering a wide range of degree programs including mutual recognition as well as self-standing modules, implementing staff and student mobility, digital learning formats and upgrading infrastructure. About 600 students are planned to receive degrees or certificates in green electronics. In addition, summer schools, sustainability hackathons, learn-repair cafés as well as expert lectures by the partner companies and research institutions are organized to attract and train students to counteract the skills shortage in microelectronics in the EU.
- European Commission (Fördergeber/Auftraggeber)
- Politecnico Di Torino
- Technische Universität Darmstadt
- Universitat Politecnica de Catalunya
- Institut Polytechnique de Grenoble
- Instituto Superior Tecnico
- INESC ID
- Infineon Technologies Austria AG
- KONCAR - ELECTRONICS AND INFORMATICS Inc.
- Silicongate LDA
- JLG Formations
- AEDVICES Consulting
- RUSZ - Verein zur Förderung der Sozialwirtschaft
- BK-Business Konsens OG
- CADENCE DESIGN SYSTEMS GMBH
- STMICROELECTRONICS (ALPS) SAS
- ONG "THE STERN STEWART INSTITUTE"/LYCEE PRIVE SHORGE
- Technische Universität Graz (Lead Partner)
Laufzeit | Jänner/2023 - März/2025 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Nicht wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
This project is dedicated to establish procedures in modelling for electromagnetic compatibility as well as high-level modelling for wireless communication and EMC. It consists of three work packages. Part 1 contains the modelling of EMC for near field communication (NFC) in the automotive domain, making use of 3D simulation and circuit simulation. Part 2 deals with functional modelling using the standardized SystemC language (IEEE 1666) for a top-down concept- and verification methodology and also investigates in extending the model using SystemC-AMS (IEEE 1666.1). Also a “shift left” approach - to start software development and test early using virtual prototypes - is addressed in this part, as well as extending the model for e.g. abstract Monte-Carlo simulations of a radio-frequency (RF) signal chain. In Part 3, the feasibility and also usability of such a high-level, functional modelling approach will be extended to wireless systems incl. EMC modelling for an NXP ultra-wide-band (UWB) transceiver product, instead of a classical Verilog WREAL model. It includes a complete end-to-end (E2E) path of transmitter (TX) and receiver (RX) with a wireless channel in between (as functional IEEE 1666/1666.1 model) and simulates EMC events (“disturbers”) in the channel. It is a cooperative project between NXP Semiconductors Austria GmbH and Co KG, Silicon Austria Labs GmbH and Carinthia University of Applied Sciences.
- Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)
- NXP Semiconductors Austria GmbH (Lead Partner)
Laufzeit | Mai/2021 - März/2023 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Sensorik |
Studiengang | |
Forschungsprogramm | Regionale Impulsförderung/EFRE-REACT |
Förderinstitution/Auftraggeber |
The scientific and technological objective of PATTERN-Skin was to develop a novel embodied bendable and potentially stretchable multimodal modular robot skin that provided robots with unprecedented sensing abilities, facilitating contact-based/tactile and contact-less multimodal exploration of the world towards safe human-robot interaction. Besides the physical realization of the skin modules, physically accurate real-time simulations („digital twin“) were developed that allowed for the optimization and tailoring of skin configurations for robots and applications. Based on this sensor skin and the corresponding digital twin, PATTERN-Skin investigated model-based and AI-based methods to obtain representations of the environment for utilization in safe control strategies and aiming to meet requirements as defined in standards such as ISO 15066 and 10218 safety standards. With respect to safe, reliable, and secure assembly of full systems from a number of individual sensor skin modules, a unified design pattern utilizing Near Field Communication (NFC) and hardware security elements was investigated for both wired and wireless connectivity. By equipping robots with these enhanced sensing and interaction abilities, PATTERN-Skin was expected to impact a wide range of robotics applications ranging from personal care and assistance to agile logistics and manufacturing. The developed technologies and methods were open, modular, and non-proprietary.
This project is co-financed by the European Regional Development Fund. REACT-EU FUNDED AS PART OF THE UNION'S RESPONSE TO THE COVID-19 PANDEMIC. You can find more information about IWB/EFRE at www.efre.gv.at
- KWF - Kärntner Wirtschaftsförderungsfonds (Fördergeber/Auftraggeber)
- JOANNEUM RESEACH Forschungsgesellschaft mbH
- Alpen Adria Universität Klagenfurt
- Silicon Austria Labs GmbH
Laufzeit | Jänner/2020 - November/2022 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Hochfrequenztechnik |
Studiengang | |
Forschungsprogramm | nicht wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
The main goal of the ANAGEN project is to develop an agile analog design methodology where the IC analog engineering knowledge will be captured in executable generators implemented in Python programming language. The target of the project is to design of basic analog blocks and systems that will be reused across different system-on-chips (SoCs) and CMOS technologies.
- Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)
- Infineon Technologies Austria AG (Lead Partner)
- Johannes Kepler Universität Linz
Laufzeit | April/2019 - Dezember/2024 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Nicht wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
The “Research Lab for Radio Frequency Frontends” (RFFE-Lab) is a cooperative research lab jointly operated with Silicon Austria Labs (SAL) and co-located at CUAS. As successor of the Josef Ressel Center for Integrated CMOS RF Systems and Circuits (Interact), it acts as an innovation hub for high-level research in RF and mmWave integrated circuits for wireless and wired high-speed data communication systems.
Laufzeit | Jänner/2019 - Juni/2022 |
Homepage | Projektwebseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Sensorik |
Studiengang | |
Forschungsprogramm | Regionale Impulsförderung/EFRE-KWF |
Förderinstitution/Auftraggeber |
The aim of the CapSize project was to develop a cost-effective, novel perception sensor system for gesture recognition, position estimation, and motion tracking in a real-time human-robot working environment using innovative integrated sensor solutions. The new key technology was intended to enable the development of a Contactless and Safe Interaction Cell (CSIC), where humans could collaborate and interact with the robot in a safe and intuitive way. CapSize was a cooperative project between the University of Klagenfurt, Carinthia University of Applied Sciences, and Joanneum Research Robotics. The research target of Carinthia University of Applied Sciences was to develop an integrated circuit for capacitive sensor read-out e.g. as proximity detection, to ensure human safety and increase the collaborative productivity of robots in the future.
This project is co-financed by the ERDF European Regional Development Fund.
Laufzeit | Februar/2018 - Dezember/2030 |
Homepage | Hauptseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengänge | |
Forschungsprogramm | ZFF_1+ F&E Gruppen, 1. Call 2017 |
Förderinstitution/Auftraggeber |
Die Forschungsgruppe RESPECT hat das Ziel die unterschiedlichen, zur Zeit an der Fachhochschule unabhängig bearbeiteten Forschungsthemen im Bereich Hochfrequenztechnik, Analog- und Digitaltechnik zu bündeln und damit eine enge Zusammenarbeit und Knowhow-Austausch zu ermöglichen.
Die Forschungs- und Entwicklungsaktivitäten der Forschungsgruppe können thematisch in die 3 Themenbereiche: Integrierte Schaltungen, Systemintegration und Modellierung und Simulation gebündelt werden. Die enge Kooperation und der Austausch der vorhandenen spezifischen Kompetenzen zwischen diesen drei Themenbereichen innerhalb der Forschungsgruppe ermöglicht die Durchführung komplexer, multi-disziplinärer Projekte im Bereich integrierter Schaltungen. Weites kann im Vergleich zum Ist-Stand die internationale Sichtbarkeit im Bereich der Forschung gesteigert werden.
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Fördergeber/Auftraggeber)
Laufzeit | September/2018 - Dezember/2018 |
Homepage | Projektwebseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Sensorik |
Studiengang | |
Forschungsprogramm | Regionale Impulsförderung/EFRE-KWF |
Förderinstitution/Auftraggeber |
The demand from industry for a shared human robot work environment for safe human robot collaboration has increased tremendously in the past years. The most demanding requirement is to ensure the inherent safety of the human in such a work environment and to fulfill the technical specification ISO/TS15066 for collaborative robots in the industrial context. Current research approaches utilize vision based solutions in combination with sensors mounted on the robot manipulator to detect an approaching human. One drawback of these solutions is the occurrence of occlusions (“blind spots”) due to, e.g., robot manipulator movement. In such a situation, the robot needs to go into an intrinsically safe mode, i.e. it has to reduce the speed of the manipulator thus significantly reducing the productivity. Consequently, the lack or rather the major restrictions of the currently available perception sensor technology with respect to measurement speed, range and integrability, etc. prevents high motion speed of collaborative robots. A central point of investigation in the project is the development of a novel perception sensor system, combining a variety of physical measurement principles (capacitive, ToF, etc.) in order to increase measurement rate, range, accuracy and resolution for position estimation and motion tracking in real time of a worker in the near surrounding of the workplace and robot manipulator. Furthermore, the new perception sensor system is fully integrated in the workplace and the robot manipulator. This new key technology enables the development of a Contactless and Safe Interaction Cell (CSIC), where a human can safely fulfill collaborative tasks jointly with a robot manipulator. Parts of the perception sensor are also utilized for a gesture based human robot interface. This allows for an intuitive interaction of the human with the robot manipulator, which will improve the user experience and increase the user acceptance. The user acceptance will be further fostered through the imitation of a human-human interaction behavior as the robot manipulator will mimic human behavior in the motion planning and control strategy of the robot manipulator. The new perception sensor technology will thus tremendously increase the operational speed of the robot manipulator in the CSIC further increasing the productivity of the collaborative human robot work cell while ensuring the safety of the human throughout the entire time and raising the human acceptance and user experience due to a human like intuitive interaction and control.
Project goals:
* Development of a modular human robot work cell (Contactless and Safe Interaction Cell)
* Realtime perception sensor system
* Realtime proximity sensor system
* Capacitive to Digital Converter Sensor Chip
Nähere Informationen entnehmen Sie bitte der Webseite: https://www.efre.gv.at/
- Alpen Adria Universität Klagenfurt
- Joanneum Research Forschungsgesellschaft mbH
- KWF - Kärntner Wirtschaftsförderungsfonds (Fördergeber/Auftraggeber)
Laufzeit | Februar/2018 - Dezember/2030 |
Homepage | Hauptseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengänge | |
Forschungsprogramm | ZFF_1+ F&E Gruppen, 1. Call 2017 |
Förderinstitution/Auftraggeber |
Die Forschungsgruppe RESPECT hat das Ziel die unterschiedlichen, zur Zeit an der Fachhochschule unabhängig bearbeiteten Forschungsthemen im Bereich Hochfrequenztechnik, Analog- und Digitaltechnik zu bündeln und damit eine enge Zusammenarbeit und Knowhow-Austausch zu ermöglichen.
Die Forschungs- und Entwicklungsaktivitäten der Forschungsgruppe können thematisch in die 3 Themenbereiche: Integrierte Schaltungen, Systemintegration und Modellierung und Simulation gebündelt werden. Die enge Kooperation und der Austausch der vorhandenen spezifischen Kompetenzen zwischen diesen drei Themenbereichen innerhalb der Forschungsgruppe ermöglicht die Durchführung komplexer, multi-disziplinärer Projekte im Bereich integrierter Schaltungen. Weites kann im Vergleich zum Ist-Stand die internationale Sichtbarkeit im Bereich der Forschung gesteigert werden.
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Fördergeber/Auftraggeber)
Laufzeit | Februar/2018 - Dezember/2030 |
Homepage | Hauptseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengänge | |
Forschungsprogramm | ZFF_1+ F&E Gruppen, 1. Call 2017 |
Förderinstitution/Auftraggeber |
Die Forschungsgruppe RESPECT hat das Ziel die unterschiedlichen, zur Zeit an der Fachhochschule unabhängig bearbeiteten Forschungsthemen im Bereich Hochfrequenztechnik, Analog- und Digitaltechnik zu bündeln und damit eine enge Zusammenarbeit und Knowhow-Austausch zu ermöglichen.
Die Forschungs- und Entwicklungsaktivitäten der Forschungsgruppe können thematisch in die 3 Themenbereiche: Integrierte Schaltungen, Systemintegration und Modellierung und Simulation gebündelt werden. Die enge Kooperation und der Austausch der vorhandenen spezifischen Kompetenzen zwischen diesen drei Themenbereichen innerhalb der Forschungsgruppe ermöglicht die Durchführung komplexer, multi-disziplinärer Projekte im Bereich integrierter Schaltungen. Weites kann im Vergleich zum Ist-Stand die internationale Sichtbarkeit im Bereich der Forschung gesteigert werden.
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Fördergeber/Auftraggeber)
Laufzeit | Februar/2018 - Dezember/2030 |
Homepage | Hauptseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengänge | |
Forschungsprogramm | ZFF_1+ F&E Gruppen, 1. Call 2017 |
Förderinstitution/Auftraggeber |
Die Forschungsgruppe RESPECT hat das Ziel die unterschiedlichen, zur Zeit an der Fachhochschule unabhängig bearbeiteten Forschungsthemen im Bereich Hochfrequenztechnik, Analog- und Digitaltechnik zu bündeln und damit eine enge Zusammenarbeit und Knowhow-Austausch zu ermöglichen.
Die Forschungs- und Entwicklungsaktivitäten der Forschungsgruppe können thematisch in die 3 Themenbereiche: Integrierte Schaltungen, Systemintegration und Modellierung und Simulation gebündelt werden. Die enge Kooperation und der Austausch der vorhandenen spezifischen Kompetenzen zwischen diesen drei Themenbereichen innerhalb der Forschungsgruppe ermöglicht die Durchführung komplexer, multi-disziplinärer Projekte im Bereich integrierter Schaltungen. Weites kann im Vergleich zum Ist-Stand die internationale Sichtbarkeit im Bereich der Forschung gesteigert werden.
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Fördergeber/Auftraggeber)
Laufzeit | April/2023 - März/2028 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Josef Ressel Zentrum |
Förderinstitution/Auftraggeber |
The JR Centre for System-on-Chip Design Automation funded by the Christian Doppler Forschungsgesellschaft and Bundesministerium Arbeit und Wirtschaft aims to research fundamentally new methods for the development of „system-on-chips" in modern semiconductor technologies and to advance the automation of the development process of integrated circuits. Until now, chip designers have spent a lot of time for routine tasks like reworking basic circuit blocks with already given functionality in existing technologies to enable cost reduction. The JR Centre’s research will help to automate the development of integrated circuits and thus free up the working time of experts for innovative new development tasks, therefore making an essential contribution to strengthening competitiveness in the semiconductor industry.
- Christian Doppler Forschungsgesellschaft (CDG) (Fördergeber/Auftraggeber)
- Infineon Technologies Austria AG
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Lead Partner)
Laufzeit | Februar/2018 - Dezember/2030 |
Homepage | Hauptseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengänge | |
Forschungsprogramm | ZFF_1+ F&E Gruppen, 1. Call 2017 |
Förderinstitution/Auftraggeber |
Die Forschungsgruppe RESPECT hat das Ziel die unterschiedlichen, zur Zeit an der Fachhochschule unabhängig bearbeiteten Forschungsthemen im Bereich Hochfrequenztechnik, Analog- und Digitaltechnik zu bündeln und damit eine enge Zusammenarbeit und Knowhow-Austausch zu ermöglichen.
Die Forschungs- und Entwicklungsaktivitäten der Forschungsgruppe können thematisch in die 3 Themenbereiche: Integrierte Schaltungen, Systemintegration und Modellierung und Simulation gebündelt werden. Die enge Kooperation und der Austausch der vorhandenen spezifischen Kompetenzen zwischen diesen drei Themenbereichen innerhalb der Forschungsgruppe ermöglicht die Durchführung komplexer, multi-disziplinärer Projekte im Bereich integrierter Schaltungen. Weites kann im Vergleich zum Ist-Stand die internationale Sichtbarkeit im Bereich der Forschung gesteigert werden.
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Fördergeber/Auftraggeber)
Laufzeit | Oktober/2023 - September/2027 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Bildungsforschung |
Studiengänge | |
Forschungsprogramm | DIGITAL-2022-SKILLS-03-SPECIALISED-EDU, DIGITAL-SIMPLE |
Förderinstitution/Auftraggeber |
The EU Chips Act aims to increase Europe‘s global production share of semiconductors to 20% by 2030, leading to a need for a skilled workforce to support this growth. Additionally, the EU‘s Green Deal initiative focuses on a transition to sustainable and energy efficient technologies, further emphasizing the need for expertise in sustainable chip development and green applications. There is an EU wide shortage of skilled workers in microelectronics. Addressing this shortage will be crucial in meeting the goals of both the EU Chips Act and the Green Deal. Furthermore, the next generation of students is largely interested in contributing to a sustainable environment. Providing them with the opportunity to gain deeper expertise in this field will align their skills with the industry‘s future needs. The proposed project „Green Chips-EDU“ supports the aforementioned goals by addressing the needs and challenges of a green and digital transition in the microelectronics industry. The consortium, made up of 15 key players from 7 EU countries, aims to build an attractive education ecosystem in green microelectronics by integrating the knowledge triangle of excellent education, industries needs and research challenges. The consortium includes 6 Unite! partners working on a harmonized curriculum focusing on energy efficiency and the development of sustainable integrated circuits. The project addresses all objectives from the call by offering a wide range of degree programs including mutual recognition as well as self-standing modules, implementing staff and student mobility, digital learning formats and upgrading infrastructure. About 600 students are planned to receive degrees or certificates in green electronics. In addition, summer schools, sustainability hackathons, learn-repair cafés as well as expert lectures by the partner companies and research institutions are organized to attract and train students to counteract the skills shortage in microelectronics in the EU.
- European Commission (Fördergeber/Auftraggeber)
- Politecnico Di Torino
- Technische Universität Darmstadt
- Universitat Politecnica de Catalunya
- Institut Polytechnique de Grenoble
- Instituto Superior Tecnico
- INESC ID
- Infineon Technologies Austria AG
- KONCAR - ELECTRONICS AND INFORMATICS Inc.
- Silicongate LDA
- JLG Formations
- AEDVICES Consulting
- RUSZ - Verein zur Förderung der Sozialwirtschaft
- BK-Business Konsens OG
- CADENCE DESIGN SYSTEMS GMBH
- STMICROELECTRONICS (ALPS) SAS
- ONG "THE STERN STEWART INSTITUTE"/LYCEE PRIVE SHORGE
- Technische Universität Graz (Lead Partner)
Laufzeit | April/2023 - März/2028 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Josef Ressel Zentrum |
Förderinstitution/Auftraggeber |
The JR Centre for System-on-Chip Design Automation funded by the Christian Doppler Forschungsgesellschaft and Bundesministerium Arbeit und Wirtschaft aims to research fundamentally new methods for the development of „system-on-chips" in modern semiconductor technologies and to advance the automation of the development process of integrated circuits. Until now, chip designers have spent a lot of time for routine tasks like reworking basic circuit blocks with already given functionality in existing technologies to enable cost reduction. The JR Centre’s research will help to automate the development of integrated circuits and thus free up the working time of experts for innovative new development tasks, therefore making an essential contribution to strengthening competitiveness in the semiconductor industry.
- Christian Doppler Forschungsgesellschaft (CDG) (Fördergeber/Auftraggeber)
- Infineon Technologies Austria AG
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Lead Partner)
Laufzeit | Februar/2018 - Dezember/2030 |
Homepage | Hauptseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengänge | |
Forschungsprogramm | ZFF_1+ F&E Gruppen, 1. Call 2017 |
Förderinstitution/Auftraggeber |
Die Forschungsgruppe RESPECT hat das Ziel die unterschiedlichen, zur Zeit an der Fachhochschule unabhängig bearbeiteten Forschungsthemen im Bereich Hochfrequenztechnik, Analog- und Digitaltechnik zu bündeln und damit eine enge Zusammenarbeit und Knowhow-Austausch zu ermöglichen.
Die Forschungs- und Entwicklungsaktivitäten der Forschungsgruppe können thematisch in die 3 Themenbereiche: Integrierte Schaltungen, Systemintegration und Modellierung und Simulation gebündelt werden. Die enge Kooperation und der Austausch der vorhandenen spezifischen Kompetenzen zwischen diesen drei Themenbereichen innerhalb der Forschungsgruppe ermöglicht die Durchführung komplexer, multi-disziplinärer Projekte im Bereich integrierter Schaltungen. Weites kann im Vergleich zum Ist-Stand die internationale Sichtbarkeit im Bereich der Forschung gesteigert werden.
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Fördergeber/Auftraggeber)
Laufzeit | Oktober/2023 - September/2027 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Bildungsforschung |
Studiengänge | |
Forschungsprogramm | DIGITAL-2022-SKILLS-03-SPECIALISED-EDU, DIGITAL-SIMPLE |
Förderinstitution/Auftraggeber |
The EU Chips Act aims to increase Europe‘s global production share of semiconductors to 20% by 2030, leading to a need for a skilled workforce to support this growth. Additionally, the EU‘s Green Deal initiative focuses on a transition to sustainable and energy efficient technologies, further emphasizing the need for expertise in sustainable chip development and green applications. There is an EU wide shortage of skilled workers in microelectronics. Addressing this shortage will be crucial in meeting the goals of both the EU Chips Act and the Green Deal. Furthermore, the next generation of students is largely interested in contributing to a sustainable environment. Providing them with the opportunity to gain deeper expertise in this field will align their skills with the industry‘s future needs. The proposed project „Green Chips-EDU“ supports the aforementioned goals by addressing the needs and challenges of a green and digital transition in the microelectronics industry. The consortium, made up of 15 key players from 7 EU countries, aims to build an attractive education ecosystem in green microelectronics by integrating the knowledge triangle of excellent education, industries needs and research challenges. The consortium includes 6 Unite! partners working on a harmonized curriculum focusing on energy efficiency and the development of sustainable integrated circuits. The project addresses all objectives from the call by offering a wide range of degree programs including mutual recognition as well as self-standing modules, implementing staff and student mobility, digital learning formats and upgrading infrastructure. About 600 students are planned to receive degrees or certificates in green electronics. In addition, summer schools, sustainability hackathons, learn-repair cafés as well as expert lectures by the partner companies and research institutions are organized to attract and train students to counteract the skills shortage in microelectronics in the EU.
- European Commission (Fördergeber/Auftraggeber)
- Politecnico Di Torino
- Technische Universität Darmstadt
- Universitat Politecnica de Catalunya
- Institut Polytechnique de Grenoble
- Instituto Superior Tecnico
- INESC ID
- Infineon Technologies Austria AG
- KONCAR - ELECTRONICS AND INFORMATICS Inc.
- Silicongate LDA
- JLG Formations
- AEDVICES Consulting
- RUSZ - Verein zur Förderung der Sozialwirtschaft
- BK-Business Konsens OG
- CADENCE DESIGN SYSTEMS GMBH
- STMICROELECTRONICS (ALPS) SAS
- ONG "THE STERN STEWART INSTITUTE"/LYCEE PRIVE SHORGE
- Technische Universität Graz (Lead Partner)
Laufzeit | April/2023 - März/2028 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Josef Ressel Zentrum |
Förderinstitution/Auftraggeber |
The JR Centre for System-on-Chip Design Automation funded by the Christian Doppler Forschungsgesellschaft and Bundesministerium Arbeit und Wirtschaft aims to research fundamentally new methods for the development of „system-on-chips" in modern semiconductor technologies and to advance the automation of the development process of integrated circuits. Until now, chip designers have spent a lot of time for routine tasks like reworking basic circuit blocks with already given functionality in existing technologies to enable cost reduction. The JR Centre’s research will help to automate the development of integrated circuits and thus free up the working time of experts for innovative new development tasks, therefore making an essential contribution to strengthening competitiveness in the semiconductor industry.
- Christian Doppler Forschungsgesellschaft (CDG) (Fördergeber/Auftraggeber)
- Infineon Technologies Austria AG
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Lead Partner)
Laufzeit | Februar/2018 - Dezember/2030 |
Homepage | Hauptseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengänge | |
Forschungsprogramm | ZFF_1+ F&E Gruppen, 1. Call 2017 |
Förderinstitution/Auftraggeber |
Die Forschungsgruppe RESPECT hat das Ziel die unterschiedlichen, zur Zeit an der Fachhochschule unabhängig bearbeiteten Forschungsthemen im Bereich Hochfrequenztechnik, Analog- und Digitaltechnik zu bündeln und damit eine enge Zusammenarbeit und Knowhow-Austausch zu ermöglichen.
Die Forschungs- und Entwicklungsaktivitäten der Forschungsgruppe können thematisch in die 3 Themenbereiche: Integrierte Schaltungen, Systemintegration und Modellierung und Simulation gebündelt werden. Die enge Kooperation und der Austausch der vorhandenen spezifischen Kompetenzen zwischen diesen drei Themenbereichen innerhalb der Forschungsgruppe ermöglicht die Durchführung komplexer, multi-disziplinärer Projekte im Bereich integrierter Schaltungen. Weites kann im Vergleich zum Ist-Stand die internationale Sichtbarkeit im Bereich der Forschung gesteigert werden.
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Fördergeber/Auftraggeber)
Laufzeit | Jänner/2023 - März/2025 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Nicht wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
This project is dedicated to establish procedures in modelling for electromagnetic compatibility as well as high-level modelling for wireless communication and EMC. It consists of three work packages. Part 1 contains the modelling of EMC for near field communication (NFC) in the automotive domain, making use of 3D simulation and circuit simulation. Part 2 deals with functional modelling using the standardized SystemC language (IEEE 1666) for a top-down concept- and verification methodology and also investigates in extending the model using SystemC-AMS (IEEE 1666.1). Also a “shift left” approach - to start software development and test early using virtual prototypes - is addressed in this part, as well as extending the model for e.g. abstract Monte-Carlo simulations of a radio-frequency (RF) signal chain. In Part 3, the feasibility and also usability of such a high-level, functional modelling approach will be extended to wireless systems incl. EMC modelling for an NXP ultra-wide-band (UWB) transceiver product, instead of a classical Verilog WREAL model. It includes a complete end-to-end (E2E) path of transmitter (TX) and receiver (RX) with a wireless channel in between (as functional IEEE 1666/1666.1 model) and simulates EMC events (“disturbers”) in the channel. It is a cooperative project between NXP Semiconductors Austria GmbH and Co KG, Silicon Austria Labs GmbH and Carinthia University of Applied Sciences.
- Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)
- NXP Semiconductors Austria GmbH (Lead Partner)
Laufzeit | Oktober/2023 - September/2027 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Bildungsforschung |
Studiengänge | |
Forschungsprogramm | DIGITAL-2022-SKILLS-03-SPECIALISED-EDU, DIGITAL-SIMPLE |
Förderinstitution/Auftraggeber |
The EU Chips Act aims to increase Europe‘s global production share of semiconductors to 20% by 2030, leading to a need for a skilled workforce to support this growth. Additionally, the EU‘s Green Deal initiative focuses on a transition to sustainable and energy efficient technologies, further emphasizing the need for expertise in sustainable chip development and green applications. There is an EU wide shortage of skilled workers in microelectronics. Addressing this shortage will be crucial in meeting the goals of both the EU Chips Act and the Green Deal. Furthermore, the next generation of students is largely interested in contributing to a sustainable environment. Providing them with the opportunity to gain deeper expertise in this field will align their skills with the industry‘s future needs. The proposed project „Green Chips-EDU“ supports the aforementioned goals by addressing the needs and challenges of a green and digital transition in the microelectronics industry. The consortium, made up of 15 key players from 7 EU countries, aims to build an attractive education ecosystem in green microelectronics by integrating the knowledge triangle of excellent education, industries needs and research challenges. The consortium includes 6 Unite! partners working on a harmonized curriculum focusing on energy efficiency and the development of sustainable integrated circuits. The project addresses all objectives from the call by offering a wide range of degree programs including mutual recognition as well as self-standing modules, implementing staff and student mobility, digital learning formats and upgrading infrastructure. About 600 students are planned to receive degrees or certificates in green electronics. In addition, summer schools, sustainability hackathons, learn-repair cafés as well as expert lectures by the partner companies and research institutions are organized to attract and train students to counteract the skills shortage in microelectronics in the EU.
- European Commission (Fördergeber/Auftraggeber)
- Politecnico Di Torino
- Technische Universität Darmstadt
- Universitat Politecnica de Catalunya
- Institut Polytechnique de Grenoble
- Instituto Superior Tecnico
- INESC ID
- Infineon Technologies Austria AG
- KONCAR - ELECTRONICS AND INFORMATICS Inc.
- Silicongate LDA
- JLG Formations
- AEDVICES Consulting
- RUSZ - Verein zur Förderung der Sozialwirtschaft
- BK-Business Konsens OG
- CADENCE DESIGN SYSTEMS GMBH
- STMICROELECTRONICS (ALPS) SAS
- ONG "THE STERN STEWART INSTITUTE"/LYCEE PRIVE SHORGE
- Technische Universität Graz (Lead Partner)
Laufzeit | April/2023 - März/2028 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Josef Ressel Zentrum |
Förderinstitution/Auftraggeber |
The JR Centre for System-on-Chip Design Automation funded by the Christian Doppler Forschungsgesellschaft and Bundesministerium Arbeit und Wirtschaft aims to research fundamentally new methods for the development of „system-on-chips" in modern semiconductor technologies and to advance the automation of the development process of integrated circuits. Until now, chip designers have spent a lot of time for routine tasks like reworking basic circuit blocks with already given functionality in existing technologies to enable cost reduction. The JR Centre’s research will help to automate the development of integrated circuits and thus free up the working time of experts for innovative new development tasks, therefore making an essential contribution to strengthening competitiveness in the semiconductor industry.
- Christian Doppler Forschungsgesellschaft (CDG) (Fördergeber/Auftraggeber)
- Infineon Technologies Austria AG
- FH Kärnten - gemeinnützige Gesellschaft mbH (Forschung) (Lead Partner)
Laufzeit | April/2019 - Dezember/2024 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Nicht wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
The “Research Lab for Radio Frequency Frontends” (RFFE-Lab) is a cooperative research lab jointly operated with Silicon Austria Labs (SAL) and co-located at CUAS. As successor of the Josef Ressel Center for Integrated CMOS RF Systems and Circuits (Interact), it acts as an innovation hub for high-level research in RF and mmWave integrated circuits for wireless and wired high-speed data communication systems.
Laufzeit | Dezember/2023 - Oktober/2024 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Mikroelektronik |
Studiengang | |
Forschungsprogramm | Wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
Polymer fibers (PMF) reflect the latest and leading-edge research in wireline communication systems and a next step in direction of low-power, low-cost and high speed operation. Compared to optical fibers, they can be significantly more cost efficient in installation and operation. In respect to copper (twisted-pair e.g. CAT7/8 Ethernet, SATA, HDMI or similar), they can be also faster at lower power consumption. This applied research project aims to develop a research platform on one of the latest RF-SoC (radio frequency – system on chip) FPGAs (field programmable gate array), to allow more detailed analysis of the potential of such PMF links and to develop a real-life demonstration to show its capability. The research includes research on reliable communication (modulation) systems, which will differ significantly to the mentioned optical and copper SERDES (serialize/deserialize) connections but this system not yet defined. It also includes for the integration of the RF link the integration of the latest 60GHz transceiver ICs of Infineon Technologies (BGT60), which is also financing this research project. Thus this work can contribute to the development of a future PMF link standard, in a similar fashion as the initially mentioned standardized communication links.
- Infineon Technologies Austria AG (Fördergeber/Auftraggeber)
Laufzeit | Mai/2021 - März/2023 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Sensorik |
Studiengang | |
Forschungsprogramm | Regionale Impulsförderung/EFRE-REACT |
Förderinstitution/Auftraggeber |
The scientific and technological objective of PATTERN-Skin was to develop a novel embodied bendable and potentially stretchable multimodal modular robot skin that provided robots with unprecedented sensing abilities, facilitating contact-based/tactile and contact-less multimodal exploration of the world towards safe human-robot interaction. Besides the physical realization of the skin modules, physically accurate real-time simulations („digital twin“) were developed that allowed for the optimization and tailoring of skin configurations for robots and applications. Based on this sensor skin and the corresponding digital twin, PATTERN-Skin investigated model-based and AI-based methods to obtain representations of the environment for utilization in safe control strategies and aiming to meet requirements as defined in standards such as ISO 15066 and 10218 safety standards. With respect to safe, reliable, and secure assembly of full systems from a number of individual sensor skin modules, a unified design pattern utilizing Near Field Communication (NFC) and hardware security elements was investigated for both wired and wireless connectivity. By equipping robots with these enhanced sensing and interaction abilities, PATTERN-Skin was expected to impact a wide range of robotics applications ranging from personal care and assistance to agile logistics and manufacturing. The developed technologies and methods were open, modular, and non-proprietary.
This project is co-financed by the European Regional Development Fund. REACT-EU FUNDED AS PART OF THE UNION'S RESPONSE TO THE COVID-19 PANDEMIC. You can find more information about IWB/EFRE at www.efre.gv.at
- KWF - Kärntner Wirtschaftsförderungsfonds (Fördergeber/Auftraggeber)
- JOANNEUM RESEACH Forschungsgesellschaft mbH
- Alpen Adria Universität Klagenfurt
- Silicon Austria Labs GmbH
Laufzeit | Jänner/2019 - Juni/2022 |
Homepage | Projektwebseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Sensorik |
Studiengang | |
Forschungsprogramm | Regionale Impulsförderung/EFRE-KWF |
Förderinstitution/Auftraggeber |
The aim of the CapSize project was to develop a cost-effective, novel perception sensor system for gesture recognition, position estimation, and motion tracking in a real-time human-robot working environment using innovative integrated sensor solutions. The new key technology was intended to enable the development of a Contactless and Safe Interaction Cell (CSIC), where humans could collaborate and interact with the robot in a safe and intuitive way. CapSize was a cooperative project between the University of Klagenfurt, Carinthia University of Applied Sciences, and Joanneum Research Robotics. The research target of Carinthia University of Applied Sciences was to develop an integrated circuit for capacitive sensor read-out e.g. as proximity detection, to ensure human safety and increase the collaborative productivity of robots in the future.
This project is co-financed by the ERDF European Regional Development Fund.
Laufzeit | Jänner/2020 - November/2022 |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Hochfrequenztechnik |
Studiengang | |
Forschungsprogramm | nicht wirtschaftliche Forschung |
Förderinstitution/Auftraggeber |
The main goal of the ANAGEN project is to develop an agile analog design methodology where the IC analog engineering knowledge will be captured in executable generators implemented in Python programming language. The target of the project is to design of basic analog blocks and systems that will be reused across different system-on-chips (SoCs) and CMOS technologies.
- Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)
- Infineon Technologies Austria AG (Lead Partner)
- Johannes Kepler Universität Linz
Laufzeit | September/2018 - Dezember/2018 |
Homepage | Projektwebseite |
Projektleitung | |
Projektmitarbeiter*innen | |
Forschungsschwerpunkt | Sensorik |
Studiengang | |
Forschungsprogramm | Regionale Impulsförderung/EFRE-KWF |
Förderinstitution/Auftraggeber |
The demand from industry for a shared human robot work environment for safe human robot collaboration has increased tremendously in the past years. The most demanding requirement is to ensure the inherent safety of the human in such a work environment and to fulfill the technical specification ISO/TS15066 for collaborative robots in the industrial context. Current research approaches utilize vision based solutions in combination with sensors mounted on the robot manipulator to detect an approaching human. One drawback of these solutions is the occurrence of occlusions (“blind spots”) due to, e.g., robot manipulator movement. In such a situation, the robot needs to go into an intrinsically safe mode, i.e. it has to reduce the speed of the manipulator thus significantly reducing the productivity. Consequently, the lack or rather the major restrictions of the currently available perception sensor technology with respect to measurement speed, range and integrability, etc. prevents high motion speed of collaborative robots. A central point of investigation in the project is the development of a novel perception sensor system, combining a variety of physical measurement principles (capacitive, ToF, etc.) in order to increase measurement rate, range, accuracy and resolution for position estimation and motion tracking in real time of a worker in the near surrounding of the workplace and robot manipulator. Furthermore, the new perception sensor system is fully integrated in the workplace and the robot manipulator. This new key technology enables the development of a Contactless and Safe Interaction Cell (CSIC), where a human can safely fulfill collaborative tasks jointly with a robot manipulator. Parts of the perception sensor are also utilized for a gesture based human robot interface. This allows for an intuitive interaction of the human with the robot manipulator, which will improve the user experience and increase the user acceptance. The user acceptance will be further fostered through the imitation of a human-human interaction behavior as the robot manipulator will mimic human behavior in the motion planning and control strategy of the robot manipulator. The new perception sensor technology will thus tremendously increase the operational speed of the robot manipulator in the CSIC further increasing the productivity of the collaborative human robot work cell while ensuring the safety of the human throughout the entire time and raising the human acceptance and user experience due to a human like intuitive interaction and control.
Project goals:
* Development of a modular human robot work cell (Contactless and Safe Interaction Cell)
* Realtime perception sensor system
* Realtime proximity sensor system
* Capacitive to Digital Converter Sensor Chip
Nähere Informationen entnehmen Sie bitte der Webseite: https://www.efre.gv.at/
- Alpen Adria Universität Klagenfurt
- Joanneum Research Forschungsgesellschaft mbH
- KWF - Kärntner Wirtschaftsförderungsfonds (Fördergeber/Auftraggeber)
Artikel in Zeitschriften | ||
---|---|---|
Titel | Autor | Jahr |
Vielseitiger Eigenbau-Sequenzer im Miniaturformat Funkamateur - Das internationale Fachmagazin für Amateurfunk, Elektronik und Funktechnik, S. 213 | Scherr, W. | 2021 |
Konferenzbeiträge | ||
---|---|---|
Titel | Autor | Jahr |
Design Automation of a 2GHz Dynamic Comparator Using the CCC Framework in: IEEExplore (Hrsg.), Austrochip 2024, 25-26 Sep 2024, Wien | Arasada, R., Petrescu, V., Scherr, W., Paoli, G., Sondón, S., Sturm, J. | 2024 |
Learning IC design and the role of Coside enabling the use of SystemC (AMS) in education in: Coseda Usergroup Meeting 2024, 04-04 Dec 2024, Dresden | Scherr, W. | 2024 |
A lightweight Python framework for analogue circuit design, optimisation, verification and reuse in: Accellera (Hrsg.), DVCon 2024, 15-16 Oct 2024, München | Scherr, W., Petrescu, V., Sturm, J., Hammerschmidt, D., Sondón, S. | 2024 |
An Easy to Use Python Framework for Circuit Sizing from Designers for Designers in: IEEExplore (Hrsg.), Austrochip 2024, 25-26 Sep 2024, Wien | Scherr, W., Petrescu, V., Sturm, J., Hammerschmidt, D., Sondón, S. | 2024 |
Comparative Analysis of Modeling Communication in SoCs for the Shift-Left Paradigm using IEEE 1666 SystemC in: IEEExplore (Hrsg.), Telfor 2024, 26-27 Nov 2024, Belgrade | Shyam, S., Paoli, G., Rizkalla, S., Auinger, B., Dorda, A., Jeurissen, D., Scherr, W. | 2024 |
Modeling Communications in SoC and Co-simulation Analysis with IEEE 1666 SystemC in: IEEExplore (Hrsg.), Telfor 2024, 26-27 Nov 2024, Belgrade | Shyam, S., Paoli, G., Scherr, W. | 2024 |
BAG2 Assisted Hierarchical Analog Layout Synthesis for Planar Technologies in: IEEE Xplore (Hrsg.), Austrochip Workshop on Microelectronics (Austrochip), 20-21 Sep 2023, Graz | BIO, M., Scherr, W., Agbemenu, A., Sondón, S., Sturm, J., Hande, V. | 2023 |
HW-SW development "Shift Left" in: Digital Dialogue: "Integrated Electronic Systems", 27-27 Jun 2023, Villach | Scherr, W., Mueller, B., Jeurissen, D. | 2023 |
High-level synthesis of digital signal processing circuits in: 32nd International Electrotechnical and Computer Science Conference, 28-29 Sep 2023, Portorož, Slovenija | Trost, A., Scherr, W., Sturm, J. | 2023 |
A low-complexity DDS-based I/Q reference signal generation for capacitive sensing in 65nm CMOS in: IEEE (Hrsg.), IEEE Austrochip Workshop on Microelectronics (Austrochip), 11-11 Oct 2022 | BIO, M., Ley, M., Bihlo, I., Filipitsch, B., Arndt, T., Scherr, W. | 2022 |
Novel Capacitance Sensing Measurement Technique for Human-Robot Co-existence in: IEEE (Hrsg.), IEEE Austrochip Workshop on Microelectronics (Austrochip), 11-11 Oct 2022 | Hande, V., Scherr, W., MORADIAN BOVANLOO, M., Reddy, S., MIKHAIL, O., Zangl, H., Sturm, J. | 2022 |
Prototyping for a DDS-based I/Q reference signal generation on a capacitive sensing chip in 65nm CMOS using SystemC AMS, C HLS and VHDL in: IEEE Xplore (Hrsg.), 2021 Austrochip Workshop on Microelectronics (Austrochip), 14-14 Oct 2021, Linz, Austria | BIO, M., Gietler, H., Plazonic, J., Ley, M., Zangl, H., Scherr, W. | 2021 |
Beyond real number modeling: Comparison of analog modeling approaches. in: Forum on specification and Design Languages (FDL), 08-18 Sep 2021, Kiel | Scherr, W., Einwich, K. | 2021 |
SystemC-AMS ELN: the new way of generating macro models ? in: COSEDA User Group Conference, 04-04 Nov 2020, Dresden | Scherr, W. | 2020 |
Design of Stable and Configurable Digital Filters for Automotive Sensors in: Austrochip, Oct 2013 | Kantamneni, V., Scherr, W., Rinner, B. | 2013 |
A miniature digital current sensor with differential Hall probes using enhanced chopping techniques and mechanical stress compensation in: IEEE Sensors, 28-31 Oct 2012 | Motz, M., Udo, A., Bresch, M., Fakesch, U., Schaffer, B., Reidl, C., Scherr, W., Pircher, G., Strasser, M., Strutz, V. | 2012 |
SystemC-AMS Modelling of Embedded Systems for Automotive Applications in: 1st SystemC-AMS Workshop, 25-25 Jun 2007 | Scherr, W., Granig, W. | 2007 |
An Integrated Magnetic Sensor with Two Continuous-Time Delta-Sigma-Converters and Stress Compensation Capability in: IEEE Sensors 2006, 2006, Daegu | Motz, M., Ausserlechner, U., Scherr, W., Katzmaier, E. | 2006 |
Power Saving Algorithms for Tire Pressure Monitoring Based on Pressure Measurement in: SAE World Congress, 11-14 Apr 2005, Detroit, MI | Hammerschmidt, D., Kolle, C., Scherr, W. | 2005 |
Configurable computing architectures for wireless and software defined radio - a FPGA prototyping experience using high level design-tool-chains in: International Symposium on System-on-Chip (ISSOC), 16-18 Nov 2004 | Blaickner, A., Albl, S., Scherr, W. | 2004 |
A FEC Codec-Processor (ASIP) for Software Defined Radio in: Software Defined Radio (SDR), 15-18 Nov 2004, Phoenix, AZ | Blaickner, A., Scherr, W. | 2004 |
Ultra low-power monolithically integrated, capacitive pressure sensor for tire pressure monitoring in: IEEE Sensors 2004 Vienna, 2004, Vienna | Kolle, C., Scherr, W., Hammerschmidt, D., Pichler, G., Motz, M., Schaffer, B., Forster, B. | 2004 |
sonstige Publikationen | ||
---|---|---|
Titel | Autor | Jahr |
Transverter verwenden ohne Hürden Das Amateurfunkmagazin CQ DL des dt. Amateurfunkvereins | Scherr, W. | 2019 |
Little helper for various control tasks DUBUS magazine | Scherr, W. | 2018 |
Konferenzbeiträge | ||
---|---|---|
Titel | Autor | Jahr |
Design Automation of a 2GHz Dynamic Comparator Using the CCC Framework in: IEEExplore (Hrsg.), Austrochip 2024, 25-26 Sep 2024, Wien | Arasada, R., Petrescu, V., Scherr, W., Paoli, G., Sondón, S., Sturm, J. | 2024 |
Learning IC design and the role of Coside enabling the use of SystemC (AMS) in education in: Coseda Usergroup Meeting 2024, 04-04 Dec 2024, Dresden | Scherr, W. | 2024 |
A lightweight Python framework for analogue circuit design, optimisation, verification and reuse in: Accellera (Hrsg.), DVCon 2024, 15-16 Oct 2024, München | Scherr, W., Petrescu, V., Sturm, J., Hammerschmidt, D., Sondón, S. | 2024 |
An Easy to Use Python Framework for Circuit Sizing from Designers for Designers in: IEEExplore (Hrsg.), Austrochip 2024, 25-26 Sep 2024, Wien | Scherr, W., Petrescu, V., Sturm, J., Hammerschmidt, D., Sondón, S. | 2024 |
Comparative Analysis of Modeling Communication in SoCs for the Shift-Left Paradigm using IEEE 1666 SystemC in: IEEExplore (Hrsg.), Telfor 2024, 26-27 Nov 2024, Belgrade | Shyam, S., Paoli, G., Rizkalla, S., Auinger, B., Dorda, A., Jeurissen, D., Scherr, W. | 2024 |
Modeling Communications in SoC and Co-simulation Analysis with IEEE 1666 SystemC in: IEEExplore (Hrsg.), Telfor 2024, 26-27 Nov 2024, Belgrade | Shyam, S., Paoli, G., Scherr, W. | 2024 |
Konferenzbeiträge | ||
---|---|---|
Titel | Autor | Jahr |
BAG2 Assisted Hierarchical Analog Layout Synthesis for Planar Technologies in: IEEE Xplore (Hrsg.), Austrochip Workshop on Microelectronics (Austrochip), 20-21 Sep 2023, Graz | BIO, M., Scherr, W., Agbemenu, A., Sondón, S., Sturm, J., Hande, V. | 2023 |
HW-SW development "Shift Left" in: Digital Dialogue: "Integrated Electronic Systems", 27-27 Jun 2023, Villach | Scherr, W., Mueller, B., Jeurissen, D. | 2023 |
High-level synthesis of digital signal processing circuits in: 32nd International Electrotechnical and Computer Science Conference, 28-29 Sep 2023, Portorož, Slovenija | Trost, A., Scherr, W., Sturm, J. | 2023 |
Konferenzbeiträge | ||
---|---|---|
Titel | Autor | Jahr |
A low-complexity DDS-based I/Q reference signal generation for capacitive sensing in 65nm CMOS in: IEEE (Hrsg.), IEEE Austrochip Workshop on Microelectronics (Austrochip), 11-11 Oct 2022 | BIO, M., Ley, M., Bihlo, I., Filipitsch, B., Arndt, T., Scherr, W. | 2022 |
Novel Capacitance Sensing Measurement Technique for Human-Robot Co-existence in: IEEE (Hrsg.), IEEE Austrochip Workshop on Microelectronics (Austrochip), 11-11 Oct 2022 | Hande, V., Scherr, W., MORADIAN BOVANLOO, M., Reddy, S., MIKHAIL, O., Zangl, H., Sturm, J. | 2022 |
Artikel in Zeitschriften | ||
---|---|---|
Titel | Autor | Jahr |
Vielseitiger Eigenbau-Sequenzer im Miniaturformat Funkamateur - Das internationale Fachmagazin für Amateurfunk, Elektronik und Funktechnik, S. 213 | Scherr, W. | 2021 |
Konferenzbeiträge | ||
---|---|---|
Titel | Autor | Jahr |
Prototyping for a DDS-based I/Q reference signal generation on a capacitive sensing chip in 65nm CMOS using SystemC AMS, C HLS and VHDL in: IEEE Xplore (Hrsg.), 2021 Austrochip Workshop on Microelectronics (Austrochip), 14-14 Oct 2021, Linz, Austria | BIO, M., Gietler, H., Plazonic, J., Ley, M., Zangl, H., Scherr, W. | 2021 |
Beyond real number modeling: Comparison of analog modeling approaches. in: Forum on specification and Design Languages (FDL), 08-18 Sep 2021, Kiel | Scherr, W., Einwich, K. | 2021 |
Konferenzbeiträge | ||
---|---|---|
Titel | Autor | Jahr |
SystemC-AMS ELN: the new way of generating macro models ? in: COSEDA User Group Conference, 04-04 Nov 2020, Dresden | Scherr, W. | 2020 |
Konferenzbeiträge | ||
---|---|---|
Titel | Autor | Jahr |
Design of Stable and Configurable Digital Filters for Automotive Sensors in: Austrochip, Oct 2013 | Kantamneni, V., Scherr, W., Rinner, B. | 2013 |
A miniature digital current sensor with differential Hall probes using enhanced chopping techniques and mechanical stress compensation in: IEEE Sensors, 28-31 Oct 2012 | Motz, M., Udo, A., Bresch, M., Fakesch, U., Schaffer, B., Reidl, C., Scherr, W., Pircher, G., Strasser, M., Strutz, V. | 2012 |
SystemC-AMS Modelling of Embedded Systems for Automotive Applications in: 1st SystemC-AMS Workshop, 25-25 Jun 2007 | Scherr, W., Granig, W. | 2007 |
An Integrated Magnetic Sensor with Two Continuous-Time Delta-Sigma-Converters and Stress Compensation Capability in: IEEE Sensors 2006, 2006, Daegu | Motz, M., Ausserlechner, U., Scherr, W., Katzmaier, E. | 2006 |
Power Saving Algorithms for Tire Pressure Monitoring Based on Pressure Measurement in: SAE World Congress, 11-14 Apr 2005, Detroit, MI | Hammerschmidt, D., Kolle, C., Scherr, W. | 2005 |
Configurable computing architectures for wireless and software defined radio - a FPGA prototyping experience using high level design-tool-chains in: International Symposium on System-on-Chip (ISSOC), 16-18 Nov 2004 | Blaickner, A., Albl, S., Scherr, W. | 2004 |
A FEC Codec-Processor (ASIP) for Software Defined Radio in: Software Defined Radio (SDR), 15-18 Nov 2004, Phoenix, AZ | Blaickner, A., Scherr, W. | 2004 |
Ultra low-power monolithically integrated, capacitive pressure sensor for tire pressure monitoring in: IEEE Sensors 2004 Vienna, 2004, Vienna | Kolle, C., Scherr, W., Hammerschmidt, D., Pichler, G., Motz, M., Schaffer, B., Forster, B. | 2004 |
sonstige Publikationen | ||
---|---|---|
Titel | Autor | Jahr |
Transverter verwenden ohne Hürden Das Amateurfunkmagazin CQ DL des dt. Amateurfunkvereins | Scherr, W. | 2019 |
Little helper for various control tasks DUBUS magazine | Scherr, W. | 2018 |