In the Chiplink project, CIME supports the development of high-speed chip-to-chip (Chiplet) data communication links for System-in-Package (SiP) chip integration.

The project objectives are (a) the systematic modelling and analysis of the signal integrity of chiplet (bunch-of-wires) data transmission links and (b) the evaluation of electromagnetic crosstalk between the single-ended chiplet data channels and sensitive RF components such as inductors in a PLL of a radar SoC.